FPGA Sticker Shock
Galorath’s Sam Sanchez works extensively with IC’s and with understanding the cost if IC’s. He provided the following:
Over the past year or so, we have been doing FPGA (Field Programmable Gate Array) material cost research updates in support of our next SEER-IC release and I can’t help being shocked at the recurring costs of some of the higher end FPGAs in the market. Once you pass the simple lower performance items, you start to see a large escalation in the per piece cost.
I remember years ago being surprised to see chips priced at $200 to $800. Now, I regularly see midsized state of the practice chips that go for $10K a piece (and I am not even talking about the leading edge 28nm stuff). At times, I come across several orders of magnitude above this. I guess it’s the sign of the times.
These devices can do more but they do not come cheap. Focusing only on performance, we might say who cares. However, as cost is becoming increasingly more critical, these new technology costs have to be examined closely. If for instance, you are targeting a portable device with a specific recurring cost bogey, you need to carefully consider what these new chip technologies mean not just in development costs but also in recurring costs. Depending on the size and amount of these FPGAs, their costs that dwarf all other BOM costs.
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High prices for the expensive stuff is one reason data center designers are shifting towards lower end processors. This is becoming increasingly tenable as mapreduce and other distribution mechanisms put devolved operations on single processors. Meanwhile, the newer data center boxes are requiring only enough voltage as the processor requires, so there is no energy penalty in deploying more wimpy servers, rather than just fewer more powerful ones. Wimpy processors hog less energy anyhow.